1. Technical Field
The present disclosure relates generally to backlight inverter circuitry for controlling a load. More specifically, the present disclosure relates to a system for providing overvoltage protection during a pulse width modulation (PWM) dimming of a liquid crystal display (LCD) backlight inverter.
2. Background of the Related Art
Overvoltage protection, which may include open circuit protection, is generally required for a backlight inverter circuit controlling a load, such as lamps, to provide safe and effective operation. When one or more lamps are not connected to the outputs of a ballast of the LCD backlight inverter, there is a huge voltage, i.e., an overvoltage condition occurs, across the ballast outputs, if some kind of protection method or system is not implemented. The overvoltage condition results in having a higher output voltage at the outputs of the ballast than a nominal output voltage when the lamps are connected to the outputs of the ballast. During the overvoltage condition, one can be injured if contact is made with the ballast outputs. Further, the overvoltage condition can damage the components of the ballast, and/or cause the ballast to run into an unexpected state, and eventually cause the ballast to be damaged.
Overvoltage protection in lamp driving circuits is described in U.S. Pat. Nos. 5,680,017, 6,011,360 and 6,084,361, the contents of which are hereby incorporated herein by reference.
In the present state of the art, as shown by the prior art backlight inverter of FIG. 1, when an overvoltage condition is detected, i.e., when the output voltage (which is proportional to an input current to controller U2) of the ballast circuit to the lamps is greater than a threshold voltage as compared by a comparator within the controller U2, a one shot timer is activated by an output of the comparator to time a one shot time interval.
The internal components of the controller U2 are described in detail in U.S. Pat. No. 5,680,017. Accordingly, the comparator used to detect an overvoltage condition may include comparator 421 which can detect a minimum overvoltage condition (OVxe2x80x2), comparator 424 which can detect a maximum overvoltage condition (OVMAX), or comparator 427 which can detect a xe2x80x9cpanicxe2x80x9d overvoltage condition (OVPANIC). The input current is fed to pin VL of the controller U2.
With continued reference to U.S. Pat. No. 5,680,017 and additionally to U.S. Pat. No. 6,011,360, the one shot timer may include an external capacitor, i.e., outside controller U2, which is connected to the third pin designated by CP, and an external resistor which is connected to the 12th pin designated by Rref. If these components and circuitry are used with the controller U2 of the backlight inverter of FIG. 1, for example, and show that the overvoltage condition exists at the end of the one shot time, the backlight inverter circuit of FIG. 1 activates overvoltage protection. When overvoltage protection is triggered during full light output, the circuit is placed into a standby mode, and the output to lamps J1, J2 drops to zero.
As a side note, when short circuit protection is triggered by the backlight inverter of FIG. 1, a power stage module PSM is shut down by cutting off the supply voltage chip_Vdd to the controller U2, and accordingly, the output of control signals S1 and S2 to the power stage module PSM and PWM dimming logic circuitry U3, respectively. The oscillation of signal S1 is controlled by at least a LampOn signal received by the controller U2 from the PWM dimming logic circuitry U3. The signals S3 and S1 drive a low and a high side, respectively, of a power switch within the power stage module PSM.
Signal S2 causes the PWM dimming logic circuitry U3 to generate and transmit signal S3 to the power stage module PSM to operate the power stage module PSM. Once the controller U2 stops operating, signals S1 and S3 stop being generated. Then, the output voltage to lamps J1, J2 drops to zero.
The one shot timer is necessary to avoid shut down due to a fault trigger, where there could be a spike or a large transient output voltage for a very short time, even when the lamps are connected to the ballast outputs. In the case of a fault trigger, the overvoltage protection is not activated at the end of the one shot timer, because it is very unlikely a fault condition will occur at the beginning and end of the one shot timer, if the lamps are connected to the ballast outputs.
A disadvantage of this conventional overvoltage protection scheme arises when pulse width modulation (PWM) is used to dim an LCD backlight inverter as shown by FIG. 1, i.e., the circuitry used to control the load or the lamps. Dimming is achieved by turning on and off the lamps with a fixed frequency, and the dimming level, i.e., the amount of dimming, is determined according to the duty cycle of the PWM signal generated by the PWM signal generator GEN and fed to the PWM dimming logic circuitry U3. If the fixed frequency is approximately 170 Hz, one is not able to sense the lamp discontinuously turning on and off (i.e., flickering) and dimming is perceived with the average light output.
When the one shot timer is used for overvoltage protection, the duration of the one shot timer, e.g., 10 msec to one second, is typically much longer than the period of the PWM signal, e.g., approximately 5-6 msec. Since the lamps are discontinuously on and off due to the fixed frequency during PWM dimming of the LCD backlight inverter, even when the lamps are removed or disconnected from the ballast outputs B1, B2, it is impossible to reliably detect a fault condition at the end of the one shot timer, due to a different dimming level, operating frequency, etc. This problem is further described below with reference to FIGS. 2A-2C.
FIG. 2A is block diagram of a prior art overvoltage protection system designated generally by reference numeral 10. In this system, output sensing xe2x80x9cOutputSensingxe2x80x9d) and threshold xe2x80x9cThresholdxe2x80x9d) voltages are inputted into a comparator 12 within a controller (not shown), which may be similar to controller U2. The output sensing voltage corresponds to the ballast voltage output level. If the output sensing voltage is greater than the threshold voltage, an activation signal is transmitted to a one shot timer 14 and a logic circuit 16 within the controller. The activation signal activates the one shot timer 14 and the one shot timer 14 begins to time a predetermined one shot time interval. At the end of the predetermined one shot time interval, if the output sensing voltage is still greater than the threshold voltage, the controller stops oscillating and transmits signals SIG1, SIG2 to turn off at least one power switch within a power stage module (not shown), which may be similar to the power stage module PSM of FIG. 1.
FIG. 2B illustrates a timing diagram during activation of the one shot timer 14 of FIG. 2A The diagram shows the PWM signal and the corresponding output sensing voltage which is assumed to be higher than the threshold voltage. A high stop timer signal (signaling the beginning of the one shot timer interval) xe2x80x9cStopTimerxe2x80x9d) is generated at time A by the one shot timer 14. When the output sensing voltage is high, i.e., at points A and C during a high PWM signal, the lamp is intended to turn on, and when the output sensing voltage is low, i.e., at points B and D during a low PWM signal, the lamp is intended to turn off. FIG. 2C illustrates a timing diagram depicting the time when the one shot timer 14 is deactivated, i.e., at the end of the predetermined one shot time interval.
A problem thus can arise at the end of the predetermined one shot time interval as exemplified in FIGS. 2B and 2C. As it can be seen from FIG. 2C, when the one shot timer 14 is off, i.e., at the end of the predetermined one shot time interval, the output voltage across the ballast outputs of the lamp is low, e.g., when the one shot time interval expires within time interval B of FIG. 2C, and the lamps are turned off due to the PWM cycling.
Accordingly, at the start of time interval C, the logic circuitry 16 will detect a low output of comparator 12 and the voltage across the ballast outputs, such as ballast outputs B1, B2 shown by FIG. 1, is kept high. However, the output voltage across the ballast outputs B1, B2 exceeds the threshold voltage. Regardless, since a low output of the comparator 12 is detected, overvoltage is not detected and hence, overvoltage protection is not triggered. This causes an overvoltage condition across the ballast outputs which cannot be reliably detected and protected.
Accordingly, a need exists for a system and method for providing overvoltage protection during pulse width modulation (PWM) dimming of a liquid crystal display (LCD) backlight inverter which overcomes the problems associated with the prior art.
In accordance with the present disclosure, a system and method for providing overvoltage protection during a pulse width modulation (PWM) dimming of a liquid crystal display (LCD) backlight inverter are provided which obviate the problems associated with the prior art.
The disclosed system and method achieves overvoltage protection by providing two low voltages (or equivalent current) signals: an output voltage sensing signal and a protection trigger threshold voltage signal. The output voltage sensing signal represents the ballast output voltage that may be obtained from an output transformer sensing winding or a capacitor divider across the ballast outputs as known in the art. The protection trigger threshold voltage signal represents a voltage level at a predetermined amount above the nominal loaded lamp voltage and below the unloaded overvoltage. The output voltage sensing signal is preferably scaled by a ratio factor to represent the output voltage and the protection trigger threshold voltage is scaled by the same ratio factor.
The output voltage sensing and protection trigger threshold voltage signals are inputted into a comparator and overvoltage protection is activated if and only if the output voltage sensing signal is higher than the protection trigger threshold voltage signal during a predetermined time interval. To minimize or ensure against erroneous overvoltage detections, the protection trigger threshold voltage signal is typically slightly higher, e.g., approximately 10% higher, than the worst case reflected ballast output voltage under all possible conditions.
In a first embodiment according to the present disclosure, when overvoltage protection during PWM dimming is reliably detected, the PWM signal is blocked (or masked) from reaching a power stage module which drives one or more lamps connected to the LCD backlight inverter. The PWM signal is blocked for a predetermined stop time interval, e.g., for approximately 10 msec to one second, as timed by a one shot timer, once an overvoltage condition is detected. If the overvoltage condition still exists at the end of the predetermined stop time interval, a latch is set and the entire system is shut down by interrupting the supply voltage to a controller.
It is contemplated that the overvoltage protection system of the present disclosure is designed to share the latch and associated circuitry of a short circuit protection system (or overcurrent protection system) to reduce the number of system components. By sharing components between the two protection systems, the total cost of the overvoltage protection system disclosed herein is reduced.
In a second embodiment according to the present disclosure, overvoltage protection during PWM dimming of the LCD backlight inverter is reliably detected, but the PWM signal which causes PWM dimming is not blocked or masked from the power stage module. In this case, the system ensures that the output voltage sensing signal accurately represents the overvoltage output voltage across the ballast outputs, even though during PWM dimming the output voltage is synchronized with the PWM signal. This is accomplished by using a sample and hold circuit where the overvoltage output voltage is detected during the lamp on period and the output voltage sensing signal which represents the overvoltage output voltage is held without discharging during the lamp off period. This prevents the output voltage sensing signal from discharging. The output voltage sensing signal is then provided to a similar circuit configuration as the first embodiment.
It is contemplated that the overvoltage protection system shares the latch and associated circuitry of the short circuit protection system to reduce the number of components and the total cost.
A variation of the second embodiment provides that the sample and hold scheme is not used for the output sensing voltage signal, but for the one shot timer. In this case, a series switch, either a BJT or MOS transistor, is connected to a one shot series capacitor. The switch is controlled either from its base or gate by a LampOn signal.
By using the series switch, the one shot time of the one shot timer is accumulated during the on period of the PWM signal and the series capacitor is not discharged during the off period of the PWM signal. Once the one shot timer reaches the predetermined one shot time, if there is an overvoltage condition, the latch is set and the supply voltage to the controller is interrupted, and hence overvoltage protection is provided.